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Chapter 14 Semiconductor Electronics: Materials, Devices And Simple Circuits
Introduction
Controlling electron flow is fundamental to electronics. Before 1948, vacuum tubes (like diodes, triodes, etc.) were used, where electrons from a heated cathode flowed through vacuum, controlled by electrode voltages. Vacuum tubes are bulky, consume high power, require high voltages, and have limited life and reliability.
Modern solid-state semiconductor electronics began in the 1930s with the realisation that semiconductors could control charge carrier flow. Semiconductor devices are small, low power, low voltage, and highly reliable. They operate within the solid material itself, without needing vacuum or external heating for electron supply.
This chapter introduces semiconductor physics concepts and discusses basic semiconductor devices like p-n junction diodes and transistors, along with simple circuits using them. While the field is expanding to include organic semiconductors and polymer electronics, the focus here is primarily on inorganic semiconductors, particularly silicon (Si) and germanium (Ge).
Classification Of Metals, Conductors And Semiconductors
Solids are broadly classified based on their electrical conductivity ($\sigma$) or resistivity ($\rho = 1/\sigma$):
- (i) Metals: Very low resistivity ($\rho \sim 10^{-2} - 10^{-8} \Omega \text{ m}$), high conductivity ($\sigma \sim 10^2 - 10^8 \text{ S m}^{-1}$).
- (ii) Semiconductors: Intermediate resistivity ($\rho \sim 10^{-5} - 10^6 \Omega \text{ m}$), intermediate conductivity ($\sigma \sim 10^5 - 10^{-6} \text{ S m}^{-1}$).
- (iii) Insulators: Very high resistivity ($\rho \sim 10^{11} - 10^{19} \Omega \text{ m}$), low conductivity ($\sigma \sim 10^{-11} - 10^{-19} \text{ S m}^{-1}$).
Semiconductors can be elemental (Si, Ge), inorganic compounds (CdS, GaAs), organic compounds (anthracene), or polymers (polypyrrole).
Classification is also done based on energy bands:
In a solid, electrons exist in **energy bands** rather than discrete energy levels as in isolated atoms, due to interactions between close atoms. The energy band containing valence electrons is the **valence band (VB)**. The band above the valence band is the **conduction band (CB)**, usually empty at 0 K.
- Case I: Metals: VB and CB overlap, or CB is partially filled. Electrons can easily move into the conduction band, providing many free charge carriers and high conductivity (low resistivity).
- Case II: Insulators: A large energy gap ($E_g > 3 \text{ eV}$) exists between the filled VB and empty CB. Electrons cannot gain enough thermal energy to cross this gap to reach the CB, resulting in no conduction (high resistivity).
- Case III: Semiconductors: A finite but small energy gap ($E_g < 3 \text{ eV}$) exists between the filled VB and empty CB. At room temperature, some electrons gain enough thermal energy to cross the gap into the CB, leaving vacancies (holes) in the VB. Both electrons in the CB and holes in the VB contribute to conduction, resulting in intermediate conductivity.
Example 14.1. C, Si and Ge have same lattice structure. Why is C insulator while Si and Ge intrinsic semiconductors?
Answer:
C (Carbon), Si (Silicon), and Ge (Germanium) are all in Group 14 of the periodic table, having 4 valence electrons and forming similar diamond-like crystal structures. However, their electrical conductivity differs significantly due to the difference in their energy band gaps ($E_g$).
- For Carbon (in diamond form), the energy band gap ($E_g$) is approximately 5.4 eV.
- For Silicon (Si), $E_g$ is approximately 1.1 eV.
- For Germanium (Ge), $E_g$ is approximately 0.7 eV.
The valence electrons of C, Si, and Ge are in the 2nd, 3rd, and 4th orbits, respectively. The energy required to remove an electron (related to $E_g$) is highest for C, followed by Si, and lowest for Ge. At room temperature, the thermal energy available to electrons is relatively small (around 0.025 eV). For C (diamond), the $E_g$ (5.4 eV) is very large compared to thermal energy, so virtually no electrons can be excited from the valence band to the conduction band. Thus, C behaves as an insulator.
For Si ($E_g \approx 1.1$ eV) and Ge ($E_g \approx 0.7$ eV), the band gaps are significantly smaller. At room temperature, a sufficient number of electrons can gain enough thermal energy to cross the band gap from the valence band to the conduction band. This creates free electrons in the conduction band and holes in the valence band, enabling electrical conduction. Although the number of these carriers is much smaller than in metals, it is significant enough for Si and Ge to be classified as intrinsic semiconductors.
In summary, the difference in the magnitude of the energy band gap is the reason why C is an insulator, while Si and Ge are semiconductors at room temperature.
Intrinsic Semiconductor
An **intrinsic semiconductor** is a pure semiconductor material (like Si or Ge) without any impurities. At absolute zero temperature (0 K), all valence electrons are tightly bound in covalent bonds, filling the valence band, and the conduction band is empty. The material acts as an insulator (Fig. 14.6(a)).
At temperatures above 0 K, thermal energy causes some electrons to break their covalent bonds and move from the valence band to the conduction band. This creates a mobile **electron** (negative charge carrier) in the conduction band and a **hole** (a vacancy in the covalent bond, acting as a positive charge carrier) in the valence band (Fig. 14.5(a)).
In an intrinsic semiconductor, the number of free electrons ($n_e$) in the conduction band is always equal to the number of holes ($n_h$) in the valence band. This intrinsic carrier concentration is denoted by $n_i$:
$\mathbf{n_e = n_h = n_i}$.
When an electric field is applied, free electrons in the conduction band move opposite to the field, contributing to electron current ($I_e$). Holes in the valence band move in the direction of the field. This hole movement can be visualised as a bound electron from a neighbouring bond jumping into the hole, making the hole appear to move (Fig. 14.5(b)). This contributes to hole current ($I_h$). The total current is the sum of electron and hole currents: $I = I_e + I_h$.
At equilibrium, the rate of electron-hole pair generation by thermal energy equals the rate of recombination (electrons filling holes). The intrinsic carrier concentration $n_i$ increases rapidly with temperature.
The conductivity of an intrinsic semiconductor is relatively low at room temperature, limiting its practical applications in electronic devices.
Extrinsic Semiconductor
**Extrinsic semiconductors** are formed by adding a small amount of suitable impurity atoms (dopants) to a pure (intrinsic) semiconductor. This process, called **doping**, significantly increases the semiconductor's conductivity by increasing the concentration of charge carriers.
The dopant atoms are chosen to have similar size to the semiconductor atoms to minimise lattice distortion and are added in very small concentrations (a few ppm). Depending on the type of dopant added to a tetravalent semiconductor like Si or Ge, two types of extrinsic semiconductors are formed:
N-Type Semiconductor
Formed by doping a pure semiconductor (like Si or Ge) with a **pentavalent impurity** (elements from Group 15 like As, Sb, P), which have 5 valence electrons. The dopant atom replaces a semiconductor atom in the lattice. Four of the dopant's valence electrons form covalent bonds with the four neighbouring Si/Ge atoms. The fifth valence electron is very weakly bound to the dopant atom.
This fifth electron requires very little energy (ionization energy, e.g., $\sim 0.01$ eV for Ge, $\sim 0.05$ eV for Si) to become free and move into the conduction band. These dopant atoms **donate** electrons to the conduction band, hence they are called **donor impurities**. At room temperature, most donor atoms are ionised, providing a large number of free electrons for conduction. The number of electrons from donors is much higher than the intrinsically generated electrons.
In n-type semiconductors, electrons are the **majority carriers**, and holes (from intrinsic generation) are the **minority carriers**. The number of electrons is much greater than the number of holes ($n_e \gg n_h$). While the number of intrinsically generated electron-hole pairs follows $n_e=n_h=n_i$ in pure material, in doped material, the product $n_e n_h = n_i^2$ still holds at thermal equilibrium. Due to the large number of electrons from donors, the number of holes from intrinsic generation is suppressed by increased recombination.
In terms of energy bands, doping with donors creates discrete **donor energy levels ($E_D$)** just below the conduction band edge ($E_C$). Electrons from $E_D$ easily move into the conduction band (Fig. 14.9(a)).
The overall crystal remains electrically neutral, as the positive charge of ionised donor cores is balanced by the excess free electrons.
P-Type Semiconductor
Formed by doping a pure semiconductor (like Si or Ge) with a **trivalent impurity** (elements from Group 13 like Al, B, In), which have 3 valence electrons. The dopant atom replaces a semiconductor atom. The dopant atom forms covalent bonds with three neighbouring Si/Ge atoms, but the fourth bond with a neighbour is incomplete, having a **vacancy or hole** (Fig. 14.8(a)).
This hole can accept an electron from a neighbouring covalent bond, effectively making the hole available for conduction. These dopant atoms **accept** electrons, hence they are called **acceptor impurities**. When an acceptor atom accepts an electron, it becomes effectively negatively charged. Each acceptor atom provides one hole.
In p-type semiconductors, holes are the **majority carriers**, and electrons (from intrinsic generation) are the **minority carriers**. The number of holes is much greater than the number of electrons ($n_h \gg n_e$). The product $n_e n_h = n_i^2$ still holds at thermal equilibrium.
In terms of energy bands, doping with acceptors creates discrete **acceptor energy levels ($E_A$)** just above the valence band edge ($E_V$). Electrons from the valence band easily move into these acceptor levels, creating holes in the valence band (Fig. 14.9(b)).
The crystal remains electrically neutral, as the negative charge of ionised acceptor cores is balanced by the excess holes.
In extrinsic semiconductors, the number of majority carriers is dominated by doping. The number of minority carriers is suppressed compared to the intrinsic concentration due to increased recombination with the abundant majority carriers.
Example 14.2. Suppose a pure Si crystal has $5 \times 10^{28}$ atoms m–3. It is doped by 1 ppm concentration of pentavalent As. Calculate the number of electrons and holes. Given that ni = $1.5 \times 10^{16}$ m–3. Is the material n-type or p-type?
Answer:
Given: Density of Si atoms $= 5 \times 10^{28} \text{ m}^{-3}$. Doping concentration $= 1 \text{ ppm}$ of pentavalent As. Intrinsic carrier concentration $n_i = 1.5 \times 10^{16} \text{ m}^{-3}$.
1 ppm (part per million) means 1 dopant atom per $10^6$ semiconductor atoms. Number of dopant (As) atoms $= (1/10^6) \times (\text{Number of Si atoms})$.
$N_D = (1/10^6) \times (5 \times 10^{28} \text{ m}^{-3}) = 5 \times 10^{22} \text{ m}^{-3}$.
Pentavalent As is a donor impurity. Each donor atom contributes one free electron to the conduction band. So, the number of electrons from donors is approximately equal to the donor concentration, $n_e\_donor \approx N_D = 5 \times 10^{22} \text{ m}^{-3}$.
The total number of electrons ($n_e$) in the doped semiconductor is the sum of electrons from donors and intrinsic generation. The number of holes ($n_h$) is from intrinsic generation.
In an n-type semiconductor (due to donor doping), electrons are the majority carriers. The number of electrons ($n_e$) is approximately equal to the donor concentration ($N_D$), as the intrinsic electron concentration ($n_i$) is much smaller than $N_D$ ($1.5 \times 10^{16} \ll 5 \times 10^{22}$).
Number of electrons $n_e \approx N_D = 5 \times 10^{22} \text{ m}^{-3}$.
Now, use the mass action law for semiconductors at thermal equilibrium: $n_e n_h = n_i^2$.
$(5 \times 10^{22} \text{ m}^{-3}) \times n_h = (1.5 \times 10^{16} \text{ m}^{-3})^2 = (1.5)^2 \times 10^{32} \text{ m}^{-6} = 2.25 \times 10^{32} \text{ m}^{-6}$.
$n_h = \frac{2.25 \times 10^{32}}{5 \times 10^{22}} \text{ m}^{-3} = \frac{2.25}{5} \times 10^{32-22} \text{ m}^{-3} = 0.45 \times 10^{10} \text{ m}^{-3} = 4.5 \times 10^9 \text{ m}^{-3}$.
Number of electrons $n_e \approx 5 \times 10^{22} \text{ m}^{-3}$.
Number of holes $n_h = 4.5 \times 10^9 \text{ m}^{-3}$.
Since $n_e \gg n_h$ ($5 \times 10^{22} \gg 4.5 \times 10^9$), the material is **n-type**. Pentavalent doping creates an n-type semiconductor.
P-N Junction
A **p-n junction** is the fundamental building block of many semiconductor devices. It is formed when a p-type semiconductor region is brought into contact with an n-type semiconductor region.
However, a p-n junction **cannot** be formed simply by physically joining a p-type slab and an n-type slab. The interface would be discontinuous at the atomic level, disrupting the flow of charge carriers. Special fabrication processes (like diffusion or ion implantation) are used to create a continuous crystal lattice structure across the junction, with doping changing from p-type to n-type over a very narrow region.
P-N Junction Formation
During the formation of a p-n junction (Fig. 14.10), two main processes occur:
- Diffusion: Due to the concentration gradient (more electrons in the n-region, more holes in the p-region), electrons diffuse from the n-side to the p-side, and holes diffuse from the p-side to the n-side. This movement of charge carriers constitutes a **diffusion current** across the junction.
- Drift: As electrons diffuse from n to p, they leave behind positively charged, immobile donor ions in the n-region. Similarly, as holes diffuse from p to n, they leave behind negatively charged, immobile acceptor ions in the p-region. These immobile ions create a region near the junction (on both sides) that is depleted of mobile charge carriers. This region is called the **depletion region** or depletion layer (thickness $\sim 0.1 \mu$m). The depletion region has a positive space charge on the n-side and a negative space charge on the p-side. This charge separation creates an **electric field** directed from the n-side (positive ions) to the p-side (negative ions). This electric field is called the **barrier field**. Due to this barrier field, mobile charge carriers experience a force: electrons on the p-side are swept towards the n-side, and holes on the n-side are swept towards the p-side. This motion of charge carriers due to the electric field is called **drift**, creating a **drift current** in the opposite direction to the diffusion current.
Initially, diffusion current is large. As the depletion region widens and the barrier field increases, the drift current increases. This process continues until the diffusion current and drift current become equal in magnitude and opposite in direction. At this point, **equilibrium** is reached, and there is no net current across the junction. The potential difference across the depletion region at equilibrium is called the **barrier potential** or built-in potential ($V_0$). The n-side is at a higher potential relative to the p-side (Fig. 14.11).
Example 14.3. Can we take one slab of p-type semiconductor and physically join it to another n-type semiconductor to get p-n junction?
Answer:
No, you cannot form a functioning p-n junction simply by physically joining a slab of p-type semiconductor and a slab of n-type semiconductor.
While it might seem intuitive, a physical joint, no matter how smooth it appears to our eyes, will have roughness and discontinuities at the atomic level. The typical inter-atomic spacing in a crystal lattice is on the order of angstroms ($ \approx 10^{-10}$ m). The roughness of a physically joined surface is many orders of magnitude larger than this atomic spacing.
A proper p-n junction requires a continuous crystal lattice structure across the interface where the doping changes from p-type to n-type over a very narrow region (on the order of micrometers or less). This continuity at the atomic level is essential for the diffusion and drift processes to occur effectively, leading to the formation of the depletion region and the barrier potential that governs the electrical behaviour of the junction. A physically joined interface would have many broken bonds, surface states, and trapped charges that would act as significant discontinuities and scattering centers for charge carriers, preventing the characteristic diode behavior based on controlled current flow across the junction.
Therefore, p-n junctions are fabricated using specialised techniques like diffusion, ion implantation, or epitaxial growth, which create a single, continuous crystal structure with different doping profiles in different regions.
Semiconductor Diode
A **semiconductor diode** is a p-n junction with metallic contacts at the ends for electrical connections (Fig. 14.12). It is a two-terminal device acting as a rectifier, allowing current flow predominantly in one direction.
The behaviour of a p-n junction diode is described by its current-voltage (I-V) characteristics, which depend on the external voltage applied across it (bias).
P-N Junction Diode Under Forward Bias
When the positive terminal of a battery is connected to the p-side and the negative terminal to the n-side, the diode is **forward biased** (Fig. 14.13(a)). The applied voltage $V$ opposes the built-in barrier potential $V_0$. The effective barrier height is reduced to $(V_0 - V)$, and the depletion region width decreases. If $V$ is large enough, the barrier is significantly lowered, and majority carriers gain enough energy to cross the junction. Electrons from the n-side diffuse into the p-side, and holes from the p-side diffuse into the n-side. This is called **minority carrier injection**. The diffusion of these injected minority carriers away from the junction on both sides creates a large diffusion current (typically in mA) in the forward direction. The current increases significantly with increasing forward voltage above a characteristic threshold or cut-in voltage (around 0.7 V for Si, 0.2 V for Ge).
P-N Junction Diode Under Reverse Bias
When the positive terminal of a battery is connected to the n-side and the negative terminal to the p-side, the diode is **reverse biased** (Fig. 14.15(a)). The applied voltage $V$ is in the same direction as the built-in barrier potential $V_0$. The effective barrier height is increased to $(V_0 + V)$, and the depletion region widens.
This increased barrier strongly suppresses the diffusion of majority carriers across the junction. However, minority carriers near the junction are swept across by the electric field. Electrons on the p-side move to the n-side, and holes on the n-side move to the p-side. This motion constitutes a small **drift current** (reverse current), typically in $\mu$A, called the reverse saturation current. This reverse current is nearly constant with voltage until a high reverse voltage, the breakdown voltage ($V_{br}$), is reached, where the current increases sharply. Operating beyond the breakdown voltage can destroy the diode unless current is limited.
V-I Characteristics: The I-V characteristics of a p-n junction diode (Fig. 14.16(c)) show that current flows easily in forward bias (mA range, exponential increase above threshold voltage) but is very small and nearly constant in reverse bias ($\mu$A range) until breakdown.
This unidirectional current flow property makes the p-n junction diode useful for **rectification** of ac voltages.
Dynamic resistance $r_d$ of a diode is the ratio of a small change in voltage ($\Delta V$) to the corresponding small change in current ($\Delta I$) at a specific operating point: $r_d = \Delta V / \Delta I$. It varies depending on the bias.
Example 14.4. The V-I characteristic of a silicon diode is shown in the Fig. 14.17. Calculate the resistance of the diode at (a) ID = 15 mA and (b) VD = –10 V.
Answer:
Given the V-I characteristic curve for a silicon diode (Fig. 14.17). We need to calculate the dynamic resistance $r_d = \Delta V / \Delta I$ at specified points.
(a) At $I_D = 15$ mA: Find the point on the curve where the current is 15 mA. The curve rises steeply in the forward bias. To calculate the dynamic resistance at this point, choose two points on the curve near 15 mA, say at 10 mA and 20 mA, and find the change in voltage and current between them.
From the graph: At $I_D = 20$ mA, $V_D \approx 0.8$ V. At $I_D = 10$ mA, $V_D \approx 0.7$ V.
$\Delta I = 20 \text{ mA} - 10 \text{ mA} = 10 \text{ mA} = 10 \times 10^{-3} \text{ A}$.
$\Delta V = 0.8 \text{ V} - 0.7 \text{ V} = 0.1 \text{ V}$.
Dynamic resistance at approximately 15 mA: $r_d = \frac{\Delta V}{\Delta I} = \frac{0.1 \text{ V}}{10 \times 10^{-3} \text{ A}} = \frac{0.1}{0.01} \Omega = 10 \Omega$.
The resistance of the diode at $I_D = 15$ mA is approximately 10 $\Omega$.
(b) At $V_D = -10$ V: This is in the reverse bias region. In the reverse bias, the current is very small and almost constant until the breakdown voltage. From the graph, for reverse voltages up to -10 V, the current is approximately constant at $-1 \mu$A (reverse saturation current). Let's choose two points in this region, say $V_1 = -10$ V, $I_1 = -1 \mu$A and $V_2 = -5$ V, $I_2 = -1 \mu$A.
$\Delta V = -10 \text{ V} - (-5 \text{ V}) = -5 \text{ V}$.
$\Delta I = -1 \mu\text{A} - (-1 \mu\text{A}) = 0 \mu\text{A}$.
The concept of dynamic resistance as $\Delta V / \Delta I$ is problematic when $\Delta I = 0$. Alternatively, we can calculate the static resistance $R = V/I$ at $V_D = -10$ V. Static resistance $R = \frac{V_D}{I_D} = \frac{-10 \text{ V}}{-1 \mu\text{A}} = \frac{10}{1 \times 10^{-6}} \Omega = 10 \times 10^6 \Omega = 10^7 \Omega$. The text's answer uses $\Delta V = 10$ V and $\Delta I = 1 \mu$A. This implies using the point $(-10V, -1\mu A)$ and possibly the origin $(0V, 0A)$, or another point like $(-5V, -1\mu A)$. If we take $\Delta V = 10V$ (from 0V to -10V) and $\Delta I = 1\mu A$ (from 0A to -1$\mu$A), $r_d = 10V/1\mu A = 10^7 \Omega$. This is the static resistance at that point relative to the origin. Since the reverse current is almost constant, the dynamic resistance in the reverse bias region is very high, essentially infinite for a true constant current. The text's calculation $10 \text{ V} / 1 \mu\text{A} = 10^7 \Omega$ likely refers to the static resistance or an average slope over a range including the origin.
The resistance of the diode at $V_D = -10$ V is approximately $10^7 \Omega$ (very high).
Application Of Junction Diode As A Rectifier
The ability of a p-n junction diode to conduct current easily in forward bias but almost completely block it in reverse bias makes it suitable for **rectification**, the process of converting alternating voltage (ac) into unidirectional voltage (pulsating dc). A circuit used for this purpose is called a **rectifier**.
- Half-wave rectifier: Uses a single diode in series with the load resistor ($R_L$). An ac voltage from a transformer secondary is applied. During the positive half-cycle of the ac input, the diode is forward biased and conducts, allowing current to flow through $R_L$ and producing an output voltage. During the negative half-cycle, the diode is reverse biased and does not conduct (reverse current is negligible), so the output voltage across $R_L$ is zero. The output voltage across $R_L$ is a series of positive pulses, corresponding to only half of the input ac wave.
- Full-wave rectifier: Provides rectified output corresponding to both positive and negative halves of the ac cycle.
- Center-tap full-wave rectifier: Uses two diodes and a center-tap transformer. The p-sides of the diodes are connected to the transformer secondary ends. The n-sides are connected together, and the output is taken between this common point and the center tap of the transformer secondary. During the positive half-cycle of the input, one diode is forward biased while the other is reverse biased, producing an output voltage across $R_L$. During the negative half-cycle, the polarities reverse, the first diode becomes reverse biased, and the second diode becomes forward biased, producing an output voltage across $R_L$ in the same direction as before. The output voltage is a series of positive pulses corresponding to both halves of the input cycle.
- (Bridge rectifier uses four diodes in a bridge configuration and doesn't need a center-tap transformer).
The output from rectifiers is unidirectional but pulsating (not steady dc). To get a smoother dc output, **filters** are used, typically involving capacitors and/or inductors. A capacitor connected in parallel with $R_L$ (capacitor filter) charges during the rising part of the rectified voltage and discharges through $R_L$ during the falling part, smoothing the output voltage. A large capacitance provides better filtering (larger time constant $RC$). The output voltage is closer to the peak voltage of the rectified output. Filters are essential for converting pulsating dc from rectifiers into smooth dc power supplies.
Example 14.6. In half-wave rectification, what is the output frequency if the input frequency is 50 Hz. What is the output frequency of a full-wave rectifier for the same input frequency.
Answer:
The output frequency of a rectifier refers to the frequency of the pulsating dc output waveform.
- Half-wave rectifier: For a 50 Hz input ac voltage, there is one positive pulse in the output for every complete input cycle. So, the output waveform repeats once for every input cycle. The output frequency is the same as the input frequency.
- Full-wave rectifier: For a 50 Hz input ac voltage, there are two output pulses (one from the positive half-cycle, one from the negative half-cycle) for every complete input cycle. The output waveform repeats twice for every input cycle. So, the output frequency is twice the input frequency.
Output frequency of a half-wave rectifier = Input frequency = 50 Hz.
Output frequency of a full-wave rectifier = $2 \times$ Input frequency = $2 \times 50 \text{ Hz} = 100$ Hz.
Output frequency of a full-wave rectifier is 100 Hz.
Special Purpose P-N Junction Diodes
While general-purpose p-n junction diodes are used for rectification, special-purpose diodes are fabricated for specific applications, often involving interaction with light (optoelectronic devices) or designed for operation in specific regions of their V-I characteristic.
Zener Diode
A **Zener diode** is a special p-n junction diode designed to operate reliably in the reverse breakdown region. It is heavily doped compared to a regular diode, resulting in a thin depletion region and a high electric field even at low reverse bias. The symbol is shown in Fig. 14.21(a).
The I-V characteristic (Fig. 14.21(b)) shows that in reverse bias, the current is very small until the **Zener voltage ($V_Z$, breakdown voltage)** is reached. At $V_Z$, the current increases dramatically, and the voltage across the diode remains almost constant despite large changes in current. This constant voltage property in breakdown is used for voltage regulation.
Mechanism of breakdown: The high electric field at the junction in reverse bias can pull valence electrons out of host atoms (field ionisation) or accelerate minority carriers to high energies, causing them to knock other electrons out of bonds through collisions (avalanche breakdown). Both mechanisms lead to a rapid increase in current at $V_Z$.
Zener diode as a voltage regulator: A Zener diode can regulate an unregulated dc voltage source (e.g., output from a rectifier with filter). It is connected in reverse bias across the load, in series with a resistor $R_S$ (Fig. 14.22). The Zener diode is chosen such that its $V_Z$ equals the desired regulated output voltage. The series resistor $R_S$ drops the excess voltage from the unregulated input and limits the current through the Zener diode.
If the input voltage increases, the current through $R_S$ and the Zener increases. The Zener voltage remains constant, so the extra voltage is dropped across $R_S$. If the input voltage decreases, the current through the Zener decreases, the voltage drop across $R_S$ decreases, and the Zener voltage (output) remains constant. This maintains a stable output voltage across the load, despite fluctuations in the input voltage.
Example 14.5. In a Zener regulated power supply a Zener diode with $V_Z = 6.0$ V is used for regulation. The load current is to be 4.0 mA and the unregulated input is 10.0 V. What should be the value of series resistor RS?
Answer:
Given: Zener voltage $V_Z = 6.0$ V. Load current $I_L = 4.0 \text{ mA} = 4.0 \times 10^{-3} \text{ A}$. Unregulated input voltage $V_{in} = 10.0$ V. The Zener diode is connected in parallel with the load and in series with $R_S$. The voltage across the load and the Zener diode is the regulated voltage $V_Z = 6.0$ V.
The voltage drop across the series resistor $R_S$ is $V_{RS} = V_{in} - V_Z = 10.0 \text{ V} - 6.0 \text{ V} = 4.0 \text{ V}$.
The current through the series resistor $I_{RS}$ is the sum of the load current $I_L$ and the current through the Zener diode $I_Z$. $I_{RS} = I_L + I_Z$.
For proper regulation, the Zener diode must be operating in the breakdown region, which requires a minimum current $I_Z$. Also, to handle fluctuations in input voltage or load current while maintaining constant $V_Z$, $I_Z$ should be significantly larger than $I_L$. A common design rule is to choose $I_Z$ to be at least a few times $I_L$. The text suggests choosing $I_Z = 5 \times I_L = 5 \times 4.0 \text{ mA} = 20.0 \text{ mA}$.
Then $I_{RS} = I_L + I_Z = 4.0 \text{ mA} + 20.0 \text{ mA} = 24.0 \text{ mA} = 24.0 \times 10^{-3} \text{ A}$.
Using Ohm's law for $R_S$: $R_S = V_{RS} / I_{RS}$.
$R_S = \frac{4.0 \text{ V}}{24.0 \times 10^{-3} \text{ A}} = \frac{4.0}{0.024} \Omega \approx 166.67 \Omega$. The text gives 167 $\Omega$. The nearest standard resistor value might be used in practice.
The value of the series resistor $R_S$ should be approximately 167 $\Omega$.
Optoelectronic Junction Devices
These are semiconductor devices where the interaction between light (photons) and electrons/holes is crucial for their operation. They are based on p-n junctions.
- (i) Photodiode: Operated under **reverse bias**, with a transparent window to allow light to fall on the junction (Fig. 14.23(a)). When photons with energy greater than the semiconductor's band gap ($h\nu > E_g$) are incident, they generate electron-hole pairs near the depletion region. The electric field in the depletion region separates these carriers (electrons to n-side, holes to p-side) before they recombine. This generates a photocurrent, which adds to the reverse saturation current. The magnitude of the photocurrent is proportional to the intensity of the incident light. Photodiodes are used as photodetectors to measure light intensity or detect optical signals. Operating in reverse bias makes the relatively small photocurrent easily measurable, as the reverse saturation current without illumination is very low ($\mu$A range).
- (ii) Light Emitting Diode (LED): A heavily doped p-n junction that emits light under **forward bias**. When forward biased, minority carriers are injected across the junction (electrons into p, holes into n). These excess minority carriers recombine with majority carriers near the junction. In certain semiconductor materials (direct band gap materials like GaAs), this recombination is radiative, releasing energy in the form of photons (light). The energy of the emitted photons is approximately equal to the band gap energy. Different semiconductor materials with different band gaps produce different colours of light. LEDs are efficient, have long life, and are used in displays, indicators, lighting, etc.
- (iii) Solar Cell (Photovoltaic Device): A p-n junction that generates emf (voltage) when solar radiation falls on it, converting light energy into electrical energy. It works based on the **photovoltaic effect**, similar to a photodiode but without external bias and with a larger junction area to capture more light. Light with photon energy $> E_g$ generates e-h pairs near the junction. The barrier field separates carriers (electrons to n-side, holes to p-side), creating a voltage (photovoltage) across the terminals. Connecting a load allows photocurrent to flow. Solar cells are used as power sources (satellites, calculators) and in large-scale solar energy production. Ideal materials have $E_g \approx 1.0 - 1.8$ eV for efficient conversion of the solar spectrum.
- Silicon (Si) has a band gap $E_g \approx 1.1$ eV. This allows Si to absorb a significant portion of the solar spectrum, including lower energy photons.
- Gallium Arsenide (GaAs) has a band gap $E_g \approx 1.43$ eV. This band gap is very close to the peak of the solar spectrum, making it highly efficient at absorbing the most energetic photons in the solar radiation. GaAs also has a higher absorption coefficient than Si, meaning it can absorb photons more effectively in a thinner layer.
Example 14.6. The current in the forward bias is known to be more (~mA) than the current in the reverse bias (~μA). What is the reason then to operate the photodiodes in reverse bias?
Answer:
In forward bias, the current is primarily due to the flow of majority carriers, and it is in the milliampere (mA) range. In reverse bias, the current is primarily the small reverse saturation current, which is due to the drift of minority carriers and is in the microampere ($\mu$A) range.
When light falls on the photodiode, it generates additional electron-hole pairs. These photo-generated carriers contribute to the total current. The photo-generated current is proportional to the intensity of the incident light.
If the photodiode is operated in **forward bias**, the normal forward current (in mA) is already much larger than the photo-generated current (which might be in $\mu$A or less). A small change in current due to illumination would be a tiny fraction of the large forward current, making it difficult to accurately measure or detect the photo-generated signal.
If the photodiode is operated in **reverse bias**, the normal reverse current (in $\mu$A) is very small. The photo-generated current is added to this small reverse current. Even a small photo-generated current (in the $\mu$A range) constitutes a significant relative change compared to the normal reverse current. This makes the change in current due to illumination much easier to measure and is directly proportional to the light intensity.
Therefore, photodiodes are operated in reverse bias to easily detect and measure the small photocurrent proportional to the light intensity, as it is a significant change relative to the small reverse saturation current.
Example 14.7. Why are Si and GaAs are preferred materials for solar cells?
Answer:
Si and GaAs are preferred materials for solar cell fabrication because their band gaps are well-matched to the solar radiation spectrum received on Earth's surface, allowing for efficient conversion of solar energy into electricity.
The solar spectrum (Fig. 14.26 in text) has a broad distribution of photon energies. The energy of a photon is $h\nu = hc/\lambda$. Maximum intensity in the solar spectrum is around a photon energy of 1.5 eV (corresponding to a wavelength of $\approx 800$ nm). For a solar cell, photons must have energy $h\nu > E_g$ to generate electron-hole pairs. A material with $E_g$ close to the peak solar spectrum energy allows it to absorb a large portion of the incident photons efficiently.
While materials with smaller band gaps (e.g., PbS, $E_g \approx 0.4$ eV) can absorb more photons (including lower energy ones), the energy conversion efficiency per photon is lower (voltage is proportional to $E_g$), and carriers generated far from the junction may recombine before contributing to current. Materials with much larger band gaps (e.g., CdS, $E_g \approx 2.4$ eV) absorb only the higher-energy part of the spectrum, wasting a significant portion of the incident solar energy.
Therefore, Si and GaAs offer a good balance between absorbing a wide range of solar photons and converting their energy efficiently, making them preferred materials for solar cells.
Digital Electronics And Logic Gates
Electronic signals can be analog or digital. **Analog signals** vary continuously with time (e.g., voltage from a microphone). **Digital signals** have discrete voltage levels, typically only two levels representing binary values '0' (low voltage) and '1' (high voltage). Digital electronics processes digital signals using logic gates.
Digital circuits are used in devices that work with binary information, like computers, calculators, digital watches, etc.
Logic Gates
A **logic gate** is a basic digital circuit that performs a logical operation on its input voltages to produce a specific output voltage based on a predefined logic. Logic gates control the flow of information. Each gate has a symbol and its function is described by a **truth table**, which lists all possible combinations of input logic levels and the corresponding output logic level.
Basic logic gates include NOT, OR, AND, NAND, and NOR.
- (i) NOT gate (Inverter): Has one input and one output. Output is the inverse of the input (0 if input is 1, 1 if input is 0). Symbol and truth table (Fig. 14.28).
- (ii) OR gate: Has two or more inputs and one output. Output is 1 if at least one input is 1. Output is 0 only if all inputs are 0. Symbol and truth table (Fig. 14.29).
- For $t < t_1$: Input A = 0, Input B = 0. Output Y = 0 (since A=0 and B=0).
- For $t_1 \le t < t_2$: Input A = 1, Input B = 0. Output Y = 1 (since A=1).
- For $t_2 \le t < t_3$: Input A = 1, Input B = 1. Output Y = 1 (since A=1).
- For $t_3 \le t < t_4$: Input A = 0, Input B = 1. Output Y = 1 (since B=1).
- For $t_4 \le t < t_5$: Input A = 0, Input B = 0. Output Y = 0 (since A=0 and B=0).
- For $t_5 \le t < t_6$: Input A = 1, Input B = 0. Output Y = 1 (since A=1).
- For $t \ge t_6$: Input A = 0, Input B = 1. Output Y = 1 (since B=1).
- (iii) AND gate: Has two or more inputs and one output. Output is 1 only if all inputs are 1. Output is 0 if at least one input is 0. Symbol and truth table (Fig. 14.31).
- For $t < t_1$: Input A = 0, Input B = 0. Output Y = 0 (since A=0).
- For $t_1 \le t < t_2$: Input A = 1, Input B = 0. Output Y = 0 (since B=0).
- For $t_2 \le t < t_3$: Input A = 1, Input B = 1. Output Y = 1 (since A=1 and B=1).
- For $t_3 \le t < t_4$: Input A = 0, Input B = 1. Output Y = 0 (since A=0).
- For $t_4 \le t < t_5$: Input A = 0, Input B = 0. Output Y = 0 (since A=0).
- For $t_5 \le t < t_6$: Input A = 1, Input B = 0. Output Y = 0 (since B=0).
- For $t \ge t_6$: Input A = 0, Input B = 1. Output Y = 0 (since A=0).
- (iv) NAND gate: This is a combination of an AND gate followed by a NOT gate (NOT AND). Output is 0 only if all inputs are 1. Output is 1 if at least one input is 0. Symbol and truth table (Fig. 14.33). NAND gates are **Universal Gates** because any other basic logic gate (OR, AND, NOT) can be constructed using only NAND gates.
- For $t < t_1$: Input A = 1, Input B = 1. Output Y = 0 (since A=1 and B=1).
- For $t_1 \le t < t_2$: Input A = 0, Input B = 0. Output Y = 1 (since A=0).
- For $t_2 \le t < t_3$: Input A = 0, Input B = 1. Output Y = 1 (since A=0).
- For $t_3 \le t < t_4$: Input A = 1, Input B = 0. Output Y = 1 (since B=0).
- For $t_4 \le t < t_5$: Input A = 1, Input B = 1. Output Y = 0 (since A=1 and B=1).
- For $t_5 \le t < t_6$: Input A = 0, Input B = 0. Output Y = 1 (since A=0).
- For $t \ge t_6$: Input A = 0, Input B = 1. Output Y = 1 (since A=0).
- (v) NOR gate: This is a combination of an OR gate followed by a NOT gate (NOT OR). Output is 1 only if all inputs are 0. Output is 0 if at least one input is 1. Symbol and truth table (Fig. 14.35). NOR gates are also **Universal Gates** because any other basic logic gate (OR, AND, NOT) can be constructed using only NOR gates.
Example 14.8. Justify the output waveform (Y) of the OR gate for the following inputs A and B given in Fig. 14.30.
Answer:
The output Y of an OR gate is 1 if input A is 1 OR input B is 1 OR both A and B are 1. The output is 0 only if both A and B are 0.
Let's examine the input waveforms A and B over different time intervals and determine the output Y based on the OR gate truth table:
Based on these outputs for each time interval, the output waveform Y will be as shown below:
Example 14.9. Take A and B input waveforms similar to that in Example 14.8. Sketch the output waveform obtained from AND gate.
Answer:
Given the same input waveforms A and B as in Example 14.8 (Fig. 14.30). The output Y of an AND gate is 1 only if both input A and input B are 1. The output is 0 if either input is 0 or both are 0.
Let's examine the inputs A and B over different time intervals and determine the output Y based on the AND gate truth table:
Based on these outputs for each time interval, the output waveform Y for the AND gate will be as shown below:
Example 14.10. Sketch the output Y from a NAND gate having inputs A and B given below:
Answer:
The output Y of a NAND gate is 1 if input A is 0 OR input B is 0 OR both A and B are 0. The output is 0 only if both A and B are 1.
Let's examine the input waveforms A and B over different time intervals and determine the output Y based on the NAND gate truth table:
Based on these outputs for each time interval, the output waveform Y for the NAND gate will be as shown below:
Logic gates are fundamental building blocks of digital circuits used in various electronic systems for processing binary information.
The development of the Integrated Chip (IC) containing many transistors and other components on a single chip has led to the miniaturisation and increased power of modern computers. The IC was invented in 1958. Moore's law describes the exponential growth in the number of transistors per chip over the years.
SUMMARY
This chapter introduces the basics of semiconductor electronics, classifying materials and discussing semiconductor devices and digital circuits.
- Semiconductors are materials with intermediate conductivity.
- Classification by energy bands: Metals (overlapping/partially filled bands), Insulators (large band gap), Semiconductors (small band gap).
- Intrinsic semiconductors (pure Si, Ge): Conductivity due to thermally generated electron-hole pairs ($n_e=n_h=n_i$).
- Extrinsic semiconductors (doped): Conductivity enhanced by impurities.
- n-type: Doped with pentavalent donors (As, P), $n_e \gg n_h$. Donors create levels near CB.
- p-type: Doped with trivalent acceptors (Al, B), $n_h \gg n_e$. Acceptors create levels near VB.
- p-n junction: Interface between p-type and n-type. Forms depletion region and barrier potential ($V_0$) due to diffusion/drift equilibrium.
- Semiconductor diode: A p-n junction with contacts. Allows current mostly in forward bias (p to +ve, n to -ve, barrier lowered, current in mA) and blocks in reverse bias (n to +ve, p to -ve, barrier raised, current in $\mu$A, breakdown at high voltage).
- Diode as rectifier: Converts ac to pulsating dc (half-wave or full-wave rectifier circuits). Filters (capacitor/inductor) smooth output.
- Special purpose diodes:
- Zener diode: Heavily doped, operates in reverse breakdown for voltage regulation. $V_Z$ is constant despite current change.
- Optoelectronic devices: Interact with light. Photodiode (reverse bias, detects light by photocurrent), Solar cell (generates voltage from light), LED (forward bias, emits light).
- Digital Electronics: Uses binary signals (0, 1 voltage levels).
- Logic Gates: Basic digital circuits performing logic operations on inputs (OR, AND, NOT, NAND, NOR). Defined by truth tables. Can be built using semiconductors. NAND and NOR are universal gates.
POINTS TO PONDER
Further thoughts on concepts:
- Energy levels in semiconductor bands are delocalised throughout the solid.
- Doping creates defects in semiconductors; in compound semiconductors, non-stoichiometry can also create defects affecting properties.
- Integrated Circuits (ICs) combine many components (transistors, resistors, etc.) on a single chip, enabling miniaturisation of electronics.
List of Physical Quantities and units:
| Physical Quantity | Symbol | Unit |
|---|---|---|
| Resistivity | $\rho$ | $\Omega$ m |
| Conductivity | $\sigma$ | S m$^{-1}$ |
| Energy band gap | $E_g$ | eV |
| Intrinsic carrier concentration | $n_i$ | m$^{-3}$ |
| Electron concentration | $n_e$ | m$^{-3}$ |
| Hole concentration | $n_h$ | m$^{-3}$ |
| Donor concentration | $N_D$ | m$^{-3}$ |
| Acceptor concentration | $N_A$ | m$^{-3}$ |
| Threshold voltage (cut-in voltage) | $V_{th}$ or $V_{cut-in}$ | V |
| Reverse breakdown voltage | $V_{br}$ | V |
| Zener voltage | $V_Z$ | V |
| Dynamic resistance | $r_d$ | $\Omega$ |
| Photocurrent | $I_{photo}$ | A |
| Reverse saturation current | $I_0$ | A |
Logic gates: OR, AND, NOT, NAND, NOR - functional units with truth tables.
Exercises
Question 14.1. In an n-type silicon, which of the following statement is true:
(a) Electrons are majority carriers and trivalent atoms are the dopants.
(b) Electrons are minority carriers and pentavalent atoms are the dopants.
(c) Holes are minority carriers and pentavalent atoms are the dopants.
(d) Holes are majority carriers and trivalent atoms are the dopants.
Answer:
Question 14.2. Which of the statements given in Exercise 14.1 is true for p-type semiconductos.
Answer:
Question 14.3. Carbon, silicon and germanium have four valence electrons each. These are characterised by valence and conduction bands separated by energy band gap respectively equal to $(E_g)_C$, $(E_g)_{Si}$ and $(E_g)_{Ge}$. Which of the following statements is true?
(a) $(E_g)_{Si} < (E_g)_{Ge} < (E_g)_C$
(b) $(E_g)_C < (E_g)_{Ge} > (E_g)_{Si}$
(c) $(E_g)_C > (E_g)_{Si} > (E_g)_{Ge}$
(d) $(E_g)_C = (E_g)_{Si} = (E_g)_{Ge}$
Answer:
Question 14.4. In an unbiased p-n junction, holes diffuse from the p-region to n-region because
(a) free electrons in the n-region attract them.
(b) they move across the junction by the potential difference.
(c) hole concentration in p-region is more as compared to n-region.
(d) All the above.
Answer:
Question 14.5. When a forward bias is applied to a p-n junction, it
(a) raises the potential barrier.
(b) reduces the majority carrier current to zero.
(c) lowers the potential barrier.
(d) None of the above.
Answer:
Question 14.6. In half-wave rectification, what is the output frequency if the input frequency is 50 Hz. What is the output frequency of a full-wave rectifier for the same input frequency.
Answer:
Question 14.7. A p-n photodiode is fabricated from a semiconductor with band gap of 2.8 eV. Can it detect a wavelength of 6000 nm?
Answer:
ADDITIONAL EXERCISES
Question 14.8. The number of silicon atoms per m$^3$ is $5 \times 10^{28}$. This is doped simultaneously with $5 \times 10^{22}$ atoms per m$^3$ of Arsenic and $5 \times 10^{20}$ per m$^3$ atoms of Indium. Calculate the number of electrons and holes. Given that $n_i = 1.5 \times 10^{16} \text{ m}^{–3}$. Is the material n-type or p-type?
Answer:
Question 14.9. In an intrinsic semiconductor the energy gap $E_g$ is 1.2eV. Its hole mobility is much smaller than electron mobility and independent of temperature. What is the ratio between conductivity at 600K and that at 300K? Assume that the temperature dependence of intrinsic carrier concentration $n_i$ is given by
$n_i = n_0 \exp\left(-\frac{E_g}{2k_B T}\right)$
where $n_0$ is a constant.
Answer:
Question 14.10. In a p-n junction diode, the current I can be expressed as
$I = I_0 \left[\exp\left(\frac{eV}{k_B T}\right) - 1\right]$
where $I_0$ is called the reverse saturation current, V is the voltage across the diode and is positive for forward bias and negative for reverse bias, and I is the current through the diode, $k_B$ is the Boltzmann constant (8.6×10$^{–5}$ eV/K) and T is the absolute temperature. If for a given diode $I_0 = 5 \times 10^{–12}$ A and T = 300 K, then
(a) What will be the forward current at a forward voltage of 0.6 V?
(b) What will be the increase in the current if the voltage across the diode is increased to 0.7 V?
(c) What is the dynamic resistance?
(d) What will be the current if reverse bias voltage changes from 1 V to 2 V?
Answer:
Question 14.11. You are given the two circuits as shown in Fig. 14.36. Show that circuit (a) acts as OR gate while the circuit (b) acts as AND gate.
Answer:
Question 14.12. Write the truth table for a NAND gate connected as given in Fig. 14.37.
Hence identify the exact logic operation carried out by this circuit.
Answer:
Question 14.13. You are given two circuits as shown in Fig. 14.38, which consist of NAND gates. Identify the logic operation carried out by the two circuits.
Answer:
Question 14.14. Write the truth table for circuit given in Fig. 14.39 below consisting of NOR gates and identify the logic operation (OR, AND, NOT) which this circuit is performing.
(Hint: A = 0, B = 1 then A and B inputs of second NOR gate will be 0 and hence Y=1. Similarly work out the values of Y for other combinations of A and B. Compare with the truth table of OR, AND, NOT gates and find the correct one.)
Answer:
Question 14.15. Write the truth table for the circuits given in Fig. 14.40 consisting of NOR gates only. Identify the logic operations (OR, AND, NOT) performed by the two circuits.
Answer: